Bagga, Navjeet: search on Z-Library

The world's largest scientific articles store. 70,000,000+ articles for free.

Don't use scam websites

1

An Analytical Model for Tunnel Barrier Modulation in Triple Metal Double Gate TFET

Bagga, Navjeet, Sarkar, Subir Kumar

Journal:

IEEE Transactions on Electron Devices

Year:

2015

Language:

english

File:

PDF, 618 KB

english, 2015

2

[IEEE 2015 International Conference on Computing, Communication & Automation (ICCCA) - Greater Noida, India (2015.5.15-2015.5.16)] International Conference on Computing, Communication & Automation - Recent research trends in gate engineered tunnel FET for improved current behavior by subduing the ambipolar effects: A review

Bagga, Navjeet, Sarkhel, Saheli, Sarkar, Subir Kumar

Year:

2015

Language:

english

File:

PDF, 496 KB

english, 2015

3

Compact 2D modeling and drain current performance analysis of a work function engineered double gate tunnel field effect transistor

Sarkhel, Saheli, Bagga, Navjeet, Sarkar, Subir Kumar

Journal:

Journal of Computational Electronics

Year:

2016

Language:

english

File:

PDF, 2.36 MB

english, 2016

4

Exploring the Asymmetric Characteristics of a Double Gate MOSFET with Linearly Graded Binary Metal Alloy Gate Electrode for Enhanced Performance

Bagga, Navjeet, Sarkhel, Saheli, Sarkar, Subir Kumar

Journal:

IETE Journal of Research

Year:

2016

Language:

english

File:

PDF, 1015 KB

english, 2016

5

Surface Potential and Drain Current Analytical Model of Gate All Around Triple Metal TFET

Bagga, Navjeet, Dasgupta, Sudeb

Journal:

IEEE Transactions on Electron Devices

Year:

2017

Language:

english

File:

PDF, 1.86 MB

english, 2017

6

[IEEE 2016 International Conference on Computing, Communication and Automation (ICCCA) - Greater Noida, India (2016.4.29-2016.4.30)] 2016 International Conference on Computing, Communication and Automation (ICCCA) - Analytical model for ID-VD characteristics of a triple metal double gate TFET

Bagga, Navjeet, Sarkhel, Saheli, Sarkar, Subir Kumar

Year:

2016

Language:

english

File:

PDF, 2.94 MB

english, 2016

7

Performance evaluation of a novel GAA Schottky Junction (GAASJ) TFET with heavily doped pocket

Bagga, Navjeet, Kumar, Anil, Bhattacharjee, A., Dasgupta, S.

Journal:

Superlattices and Microstructures

Year:

2017

Language:

english

File:

PDF, 1.39 MB

english, 2017

8

A compact analytical model of binary metal alloy silicon-on-nothing (BMASON) tunnel FET with interface trapped charges

Sarkhel, Saheli, Bagga, Navjeet, Sarkar, Subir Kumar

Journal:

Journal of Computational Electronics

Year:

2017

Language:

english

File:

PDF, 1.93 MB

english, 2017

9

Demonstration of a Novel Two Source Region Tunnel FET

Bagga, Navjeet, Kumar, Anil, Dasgupta, Sudeb

Journal:

IEEE Transactions on Electron Devices

Year:

2017

Language:

english

File:

PDF, 2.77 MB

english, 2017

10

[IEEE 2017 Conference on Emerging Devices and Smart Systems (ICEDSS) - Mallasamudram, Tiruchengode, India (2017.3.3-2017.3.4)] 2017 Conference on Emerging Devices and Smart Systems (ICEDSS) - Analytical threshold voltage model of gate all around triple metal tunnel FET

Bagga, Navjeet, Dasgupta, S.

Year:

2017

Language:

english

File:

PDF, 279 KB

english, 2017

11

[IEEE 2018 Conference on Emerging Devices and Smart Systems (ICEDSS) - Tiruchengode, India (2018.3.2-2018.3.3)] 2018 Conference on Emerging Devices and Smart Systems (ICEDSS) - Reduced Gate Capacitance of Dual Metal Double Gate over Single Metal Double Gate Tunnel FET: A Comparative Study

Gupta, Divyam, Bagga, Navjeet, Dasgupta, S.

Year:

2018

Language:

english

File:

PDF, 115 KB

english, 2018

12

Author’s Reply

Bagga, Navjeet, Sarkar, Subir Kumar

Journal:

IEEE Transactions on Electron Devices

Year:

2019

File:

PDF, 5 KB

2019

13

A Novel Twofold Tunnel FET With Reduced Miller Capacitance: Proposal and Investigation

Bagga, Navjeet, Chauhan, Nitanshu, Gupta, Divyam, Dasgupta, S.

Journal:

IEEE Transactions on Electron Devices

Year:

2019

Language:

english

File:

PDF, 2.39 MB

english, 2019

14

A Novel Twofold Tunnel FET With Reduced Miller Capacitance: Proposal and Investigation

Bagga, Navjeet, Chauhan, Nitanshu, Gupta, Divyam, Dasgupta, S.

Journal:

IEEE Transactions on Electron Devices

Year:

2019

File:

PDF, 2.39 MB

2019

15

[IEEE 2019 IEEE Conference on Modeling of Systems Circuits and Devices (MOS-AK India) - Hyderabad, India (2019.2.25-2019.2.27)] 2019 IEEE Conference on Modeling of Systems Circuits and Devices (MOS-AK India) - Demonstration of a Novel Ferroelectric-Dielectric Negative Capacitance Tunnel FET

Bagga, Navjeet, Chauhan, Nitanshu, Bulusu, A., Dasgupta, S.

Year:

2019

File:

PDF, 693 KB

2019

16

Demonstration of a novel tunnel FET with channel sandwiched by drain

Bagga, Navjeet, Chauhan, Nitanshu, Banchhor, Shashank, Gupta, Divyam, Dasgupta, S

Journal:

Semiconductor Science and Technology

Year:

2020

File:

PDF, 1.94 MB

2020

17

[IEEE 2020 24th International Symposium on VLSI Design and Test (VDAT) - Bhubaneswar, India (2020.7.23-2020.7.25)] 2020 24th International Symposium on VLSI Design and Test (VDAT) - Analysis of Transient Negative Capacitance Characteristics for Stabilization and Amplification

Chauhan, Nitanshu, Bajpai, Govind, Banchhor, Shashank, Bagga, Navjeet

Year:

2020

File:

PDF, 4.35 MB

2020